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EU chips act semiconductor european parliament semi industry wafer fabs funding
10
 min read
Industry
Has the EU Chips Act Failed Before it's Started? Industry Strategy Symposium 2023

The big theme at this year’s SEMI Industry Strategy Symposium (ISS) conference was ‘How does Europe fulfil its ambition by 2030’. Jamie Potter shares his thoughts on the steps being taken to achieve its ambitious goal.

The big theme at this year’s SEMI Industry Strategy Symposium (ISS) conference was ‘How does Europe fulfil its ambition by 2030?’. It involves an ambitious target of reaching a 20% share of the global semiconductor market by 2030 whilst having a more resilient industry ecosystem. This is a huge challenge, especially when one considers that the global semiconductor market is forecasted to reach $1tn by 2030. A 20% share of this would mean $200bn in just seven years. For perspective, the global market figure currently sits at $600bn which means Europe’s present-day 8% share is around $48bn. Breaking it down like this reveals the magnitude of the challenge; Europe must increase its share of the market by more than quadruple as the size of the pie increases along the way. Looking solely at Europe’s rate of growth in the market over recent years compared with the rest of the world, I can tell you that their target is infeasible. But before we conclude, there are several aspects to consider. 

First, what is going to drive this extraordinary growth? Second, why has the EU – and indeed the US which currently claims 10% of global semiconductor manufacture – set these targets? And finally, what is being planned to achieve them. 

  1. Semiconductors are a major driving force in the global economy and the EU clearly recognises this, but perhaps not to the full extent. Almost every modern innovation utilises electronics in some form or another, with the obvious mega trends over the past few years being computers and smartphones. Looking forward, applications that are likely to drive demand further include smart mobility, 5G, AI, IoT, quantum computers, 6G and so on. All of them need increasing amounts of leading-edge chips to handle everything from data capture to cloud processing in order to enable devices and systems to make smarter decisions.

  2. For years we have been enjoying a tightly integrated, global supply chain with wafers and chips crisscrossing the globe as the journey from silicon wafer to packaging to test is done in stages in centres of speciality in different countries.

    Covid and the ongoing geopolitical tensions between the US and China mean that this model is being redefined to be more robust. The ideal solution is to onshore all stages of the manufacturing process, i.e., keeping it all within US borders or within EU countries. Thus, these targets don’t intend to take a larger share of the global manufacturing pie. Instead, they aim to increase the amount of semiconductors manufactured that aren’t sent overseas to provide resilience against disruptions to the supply chain of these devices, which are essentials for a healthy economy. China is already on their way there. They currently make 16% of their chips onshore, with ambitions to increase this to 70% in the future – highlighting massive potential growth in this market.

  3. Semiconductor manufacturing requires wafer fabs. The vast majority of fabs today are in Asia, with big players such as TSMC, Samsung and UMC. The challenge with these ambitious targets is that building a new state-of-the-art fab for today’s advanced nodes takes billions of dollars, requires a skilled labour force and takes several years to build once planning permission is granted. And then there are all other stages of packaging and test facilities to be built from scratch and staffed. The skilled labour needed to manage this doesn’t currently exist in the EU so it’s clear to see how setting up totally onshore manufacturing capabilities will take considerable time, money and expertise. 

Expertise can be fast tracked by partnering with existing fab companies; such as TSMC discussing building new fabs in the US and Germany. But naturally, they require government grants from the funds being created to boost the semiconductor manufacturing industries. It’s worth comparing how much each area is allocating for this. South Korea’s figure is $450bn, the US is $233bn, and China is investing $200bn. With these sizable sums already formally approved by the relevant authorities, fab construction in these nations is already starting. 

The EU, on the other hand, is only planning to invest a comparatively tiny $43bn.

This figure is nowhere near enough to quadruple its current semiconductor manufacturing capabilities. In fact, Kurt Sievers, CEO of NXP, estimated that a more realistic figure to achieve a 20% market share would likely be over $500bn. And moreover, this has not yet been passed in parliament, so the EU is already behind on the timeline to achieve its target compared with the other market players. As for the UK, the figure has not been announced but is rumoured to be around $1bn – which is not enough to fund just one new fab at an advanced node. 

It’s important that SEMI is driving this discussion around the EU Chips Act as government funding is a critical driver for the region's growth within the global semiconductor market. But it’s not enough. As an industry, we need to take stronger action and challenge the decisions being made by the EU and the UK. They require the expertise of industry leaders to understand the full importance of microelectronics for the economy, without it I believe the money they invest will be fruitless. 

As regular readers know, our software can make existing and new build fabs smarter and substantially more productive, but in order to hit the EU’s extraordinarily ambitious targets, more funding and strategic partnerships must be considered. I suspect that one solution will entail a close relationship between the EU and the US to create a US/EU-based supply chain model with both regions working together to share their centres of excellence to create a complete, self-contained system. Even if the ambitious targets are not met, working on de-integrating the supply chain with onshoring will provide security for the electronics that underpin today’s successful economies. 

Author: Jamie Potter, CEO and Co-founder of Flexciton

Photo Credit: SEMI

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wafer fab production scheduling ai optimization semiconductor industry efficiency
10
 min read
Technical
Fab-Wide Scheduling of Semiconductor Plants: A Large-Scale Industrial Deployment Case Study

Decision-making in wafer fabs is a two-level problem. On one hand, fab-wide scheduling is tasked with the strategic management of factory assets. On the other hand, toolset-level scheduling focuses on the operation of individual work centres.

This article draws from the contents of a paper presented at Winter Simulation Conference 2022, titled: “Fab-Wide Scheduling of Semiconductor Plants: A Large-Scale Industrial Deployment Case Study”.

An Introduction to Fab-Wide Scheduling

The semiconductor industry is one of the largest and most complex industries in the world. The critical factors in semiconductor manufacturing are the ability to rapidly develop and test novel technologies, improve manufacturing processes to reduce rework and waste, as well as meet production targets in terms of prescribed volumes and due dates. In this context, high quality scheduling is of paramount importance.

Due to the long cycle times, where a wafer is processed over a span of months, decision-making in semiconductor fabrication plants (fabs) is typically framed as a two-level problem. On one hand, global scheduling (or fab-wide) is tasked with the strategic management of factory assets while considering all work-in-progress, incoming and outgoing flows across the fab, expected resource availability and other constraints. On the other hand, local (or toolset-level) scheduling focuses on the operation of individual work centres. It is typically tasked with identifying the best immediate dispatch decisions i.e. which jobs waiting for dispatch should be assigned to which available machine.

Most development efforts to date have focused on the shorter time frame dispatch decisions i.e. local scheduling. This is a more manageable problem since there is little look-ahead and the scope is limited to a single or a few toolsets. Despite numerous research efforts, to date there has not been a published case study of a fab-wide scheduler successfully deployed in a large semiconductor manufacturing facility. Nevertheless, the potential for improvement at the fab-wide level is tremendous; there are numerous opportunities to improve throughout and have a step change in performance. For example:

  • Bottlenecks occur due to repetition of process loops, high-cost machines with low capacity, and other physical or operational constraints. To manage them, a strategic approach is needed that looks at the bigger picture and avoids early dispatch of wafers that will end up in a bottleneck area. 
  • WIP flow control mechanisms (kanbans) are important for quality control but can block high-priority wafers. Fab-wide scheduling can greatly improve this aspect of operation. 
  • Timelinks (also known as timeloop, time lag, or qtime constraints) are challenging because they define the minimum or maximum amount of time between two or more consecutive process steps, leading to a conundrum of keeping downstream machines idle or not. Fab-wide scheduling can greatly assist by accurately predicting arrival times and deciding when to trigger timelinked lots.

Methodology

The scheduling framework proposed in this blog is hierarchical and consists of two main components which run independently and at different frequencies — the Toolset Scheduler (TS) and Fab-Wide Scheduler (FWS). 

The Toolset Scheduler considers the currently in-process and/or upcoming process step of all wafers in the cluster.

FWS takes a view of the entire fab at once and considers multiple future steps for each wafer. It focuses on improving schedule quality by considering the flow of wafers through the fab, something the toolset scheduler cannot do due to its singlestep, toolset-level nature. The main purpose is to redirect flow through the fab and thereby improve flow linearity, reduce bottlenecks, improve WIP flow control management, and reduce timelink violations. Our FWS approach achieves this by predicting wait/cycle times for multiple future steps, analysing those predicted wait/cycle times with respect to the different areas of potential improvement, and re-prioritising wafer steps in a way that guarantees improved (weighted) cycle times. In brief, FWS combines two main elements: (i) an operational module that captures in full detail all relevant constraints e.g. detailed process time modelling, machine maintenance, shift changes, dynamic batching constraints, kanbans etc. (ii) a search module that identifies beneficial priority changes given the evolving fab conditions and state features.

Figure 1: High-level overview of Flexciton’s Fab Wide Scheduler.

FWS communicates with the toolset schedulers via priority weights (and some other predicted timing information) for individual steps of a wafer, as shown in Figure 2. An advantage of our approach is that, while FWS always schedules all tools in the fab, users can specify which toolsets are subject to guidance; FWS adjusts its search accordingly. This is particularly useful for gradually rolling out FWS in a fab and evaluating its impact. In addition, the guidance strength is controllable - although full guidance is the optimal choice, tuning down guidance allows for a more gradual deployment.

Figure 2: Interactions between Flexciton’s local and fab-wide schedulers and how it integrates with a fab’s workflow management system.

Seagate Deployment

Seagate is a world leader in data storage technology, with more than 40% share of the global Hard Disk Drive (HDD) market. The Springtown facility in Northern Ireland produces around 25% of the total global demand for recording heads, the critical component in a HDD. Flexciton’s FWS / TS scheduling system was trialled in Seagate Springtown between March-May 2022. After successful testing, the system has been operational 24/7 since June 2022; a timeline is shown in Figure 3.

Figure 3: Trials timeline at Seagate's Springtown fab.

It is important to note that deploying and testing a novel piece of technology in a large factory that runs around the clock presents many practical challenges to be overcome:

  • Controllability (scope): important to ensure that the new development is deployed in a controlled manner. The FWS-TS guidance scheme allows for localised trials, where focus can be placed on problematic areas and gradually increase scope.
  • Controllability (magnitude): it is useful to only focus on cases with obvious merit first. This is achieved by controlling guidance strength. 
  • Explainability: important to be able to detect and reason about the changes. This is achieved by a combination of UI features and support tools which have been designed to give operators and managers situational awareness.
Figure 4: Heatmap of projected queuing time across a subset of toolsets over time. Red indicates long queuing times i.e. presence of a bottleneck, while green means that jobs can be started after little or no waiting. Network flow diagrams focusing on a toolset with (a) low and (b) high diversity flow.

Results and Learnings

Quantifying the benefit of an alternative scheduling approach remains a challenging task. When deployed in a real plant, traditional A/B testing between pre and post-deployment suffer from (i) dynamic fab conditions (ii) an ever-changing product mix and (iii) evolving capabilities of the fab e.g. increased/decreased labour capacity and new tool commissioning/decommissioning.

As such, it was decided to look at the impact from different angles - a statistically significant impact would be expected to result in a substantial shift in numerous business  processes and metrics. In particular, three different aspects were examined.

  • Deep dives on specific toolsets and metrics.
  • Comparison against internal simulation and planning tools. 
  • Observing the impact on manual interventions.

Notably, all three approaches indicated a change in fab performance between pre and post-deployment; more details will be shared in future articles. In the Winter Sim Conference paper presented in December 2022, we focused on the latter point; A proxy we can use for this benefit is the volume of ad hoc control flow rules activated/deactivated in the fab. Every day, specialists have to define numerous, in some cases even hundreds, of ad hoc control flow rules to better manage operations given the prevalent conditions. For example, setting a ”hard down” rule, where lots are manually placed on hold so as not to continue to a downstream bottleneck. In Figure 5, we show the number of ad hoc operational rules implemented in the Seagate Springtown fab between weeks 2 and 26 of the year 2022 (i.e. from early January until late June). As can be seen in the final weeks, the number of ad hoc rule transactions averaged less than 150 per week, a decrease of over 300% compared to the pre-deployment period. This is strong evidence that FWS deployment reduced massively manual interventions required to effectively control flows within the fab.

Figure 5: Weekly volume of ad hoc flow management rule transactions

Conclusions

The main takeaway of the Winter Sim paper is that the increased horizon look-ahead and global nature of FWS presents numerous opportunities for a step change in factory KPIs. The Flexciton FWS was successfully trialled at Seagate Springtown over 3 months in 2022 and has been fully enabled across the fab since June 2022. It resulted in a radical decrease of interventions previously used to manually control wafer flows. Further analysis suggests that Flexciton’s TS and FWS schedulers have achieved substantial improvements in throughput and cycle times.

Author: Ioannis Konstantelos, Principal Engineer

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flexciton flex factor optimization ai production scheduling semiconductor wafer fab
10
 min read
Culture
The Flex Factor with... Yichen

In this month’s edition of The Flex Factor, we introduce one of our QA Engineers: Yichen Tian. Have a read to find out what this serial multitasker does during her day-to-day.

In this month’s edition of The Flex Factor, we introduce one of our QA Engineers: Yichen Tian. Have a read to find out what this serial multitasker does during her day-to-day.

Tell us what you do at Flexciton?

I am a QA engineer in the Chrysalis team, which involves checking if the result of our development makes sense with automated and manual tests. I’ve also recently joined our Platform Engineering Team, whose mission is to make other developer’s lives easier by building faster CI/CD pipelines and laying the ground work of our architecture.

What does a typical day look like for you at Flexciton?

My day starts with a coffee and then a short gathering with all the team members to share updates and prepare for the day. During the day I discuss with developers about the appropriate outcomes of different user scenarios and meddle with services like GitLab and Kubernetes for the rest of my day.

What do you enjoy most about your role?

I feel it’s the excitement. As a QA I constantly switch contexts and have more than three tasks simultaneously on a busy day. I also troubleshoot pipelines and any breakage in our app and that constant change excites me.

What career advice would you give to your younger self?

To quote a member of the team, just keep swimming.

If you could do it all over again, would you pursue the same career?

I know it sounds like a cliche but I don’t regret the decisions I have made along the way. However I would love to work in an animal shelter for some time if the opportunity arises.

If you could summarise working at Flexciton in 3 words, what would they be?

Inspiring, supportive, fun.

Tell us about your best memory at Flexciton?

There are so many amazing memories I have at Flexciton! Most of them are from team trips and day to day banter. One of the best has to be swimming in the sea together and watching my colleagues play beach football in Portugal.

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semiconductor smart manufacturing complexity flexciton autonomous scheduling
10
 min read
Industry
We Need To Embrace Complexity, Not Run Away From It

As next-gen designs become increasingly sophisticated, a more holistic and streamlined approach to the manufacturing process is vital.

As next-gen designs become increasingly sophisticated, a more holistic and streamlined approach to the manufacturing process is vital.

Why Has Sophistication Become An Issue?

As I’ve talked about in previous blogs, the semiconductor industry faces serious challenges on a number of fronts. 

The supply chain issues caused by Covid are still a headache. While some industries (automotive in particular) are putting pressure on chip companies to ramp up production, others, such as data storage, suffer from demand downturns. Another key factor impacting chip making is an ongoing shortage of skilled labour within the industry. Then there’s the problem of manufacturing equipment, with companies either unable to source second-hand tools or new tools being too expensive due to inflation. And as the world’s energy crisis continues, power itself – and skyrocketing electricity bills – is also a major concern.

As I discussed in my presentation at last year’s Fab Management Forum, the big issue that underlies all of these challenges is complexity. In many ways, fabs and the way they operate haven’t changed much in the past decade – yet the products they make have become increasingly sophisticated and as a result, more difficult to manufacture at scale. It’s not unusual now to see chip designs going into production with over 1,600 unique steps required to produce them, in cycle times that can stretch up to nine months. And as an example of just how complex chips are becoming, Micron recently began volume production of the world’s first 232-layer NAND.

This level of sophistication is only going to increase in the coming years, and the complexity challenge will soon reach breaking point if fabs continue with current practices. Unless fabs introduce new methods to streamline and simplify the management of the production process, their performance and output will continue to suffer, hindered by the sophistication of their own products.

What’s the problem with how fabs attempt to deal with complexity? Currently, they follow the classic model of addressing a big problem by breaking it down into a series of smaller, more manageable problems, with different teams assigned specific challenges to tackle. However, this approach has created problems of its own – different teams within the fab also have different priorities and KPIs, which they often work towards in isolation. And as individual teams try to max their KPIs, conflicts can arise that negatively impact production itself.

Production Scheduling Is Compromised By Simplification

Let’s drill down into the complexity issue and look at how it affects production scheduling in particular. 

There are a number of different areas within chip production – metrology, photolithography, diffusion furnace, epitaxy etc – which each have their own set of tools and rules as to how they operate. Each area also has its own team with their own KPIs. So while the overarching objective of a fab is to produce a required number of saleable wafers, each team also has more granular objectives against which they’re being measured.

Typically, teams schedule production in their areas according to a series of rules that dictate the sequence in which wafers are processed - for example, this particular recipe should always run on this particular tool. That sounds simple enough, except there can be thousands of these rules for each area – in fact, it’s so difficult for industrial engineers to properly manage and control each area’s parameters that the rules tend to be full of simplifications and shortcuts.

To maintain the fab’s performance, these rules also require regular maintenance to respond to different events happening in the fab on a daily basis. Yet given their sheer volume, and the growing complexity of the products being made, it’s impossible for teams to adapt every rule to address the real-time situation. An additional issue is that each area has its own software to administer these rules and monitor its KPIs, but it generally doesn’t interoperate with the software in other areas. 

All of which means that the teams aren’t able to see the status of each other’s area – they can only operate based on their own data. Not only have the rules they use have been simplified in an attempt to deal with complexity, but they’re designed to meet each area’s objectives, not the overarching goal of production. So while individual teams may be hitting their own KPIs, the overall performance of the fab is inconsistent. 

There is no ‘big picture’ of the production process that individual teams are able to consult to guide their decision-making – and as it is, they are not being judged on overall performance, just how well their own area is doing. But this is simply not a viable way for fabs to work going forward.

Embracing Complexity 

So what is the solution for handling production complexity on its own terms rather than constantly diluting it? It’s counter-productive to try and simplify data when it’s that very complexity that makes it so powerful – and by genuinely engaging with every aspect of it, it’s possible to gain a more accurate and comprehensive picture of what’s happening in the fab. Rather than simplifying the data, we should instead be simplifying the process.

The first step to managing complexity is employing an intelligent scheduling system that operates based on a holistic overview of what’s actually happening in the fab at any one time, identifying and responding to bottlenecks in the WIP as they happen. It also needs to make these adjustments and deliver schedules autonomously, because as we’ve seen, the complexity and unpredictability of modern fab operations make it infeasible for conventional rules-based schedulers to deliver consistent results. The constant requirement for manual retuning is a drain on IE resources, and the intelligence in the software itself is not advanced enough to effectively tackle the hardest problems found in a wafer fab. 

Is such an autonomous approach to scheduling possible? Short answer, yes it is, but it requires a willingness on the part of the semiconductor industry to a) fully embrace smart manufacturing practices, and b) to switch from their conventional scheduler to deploy a best-in-class technology that leverages both the power of the cloud and the computational speed of AI.

The complexity of modern chip design demands a new approach to production that is equal to this complexity – otherwise, the industry will be forever on the back foot, constantly struggling to keep up with the future while failing to capitalise on the richness of the data available to it in the here and now.

Author: Jamie Potter, CEO and Cofounder of Flexciton

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optimization scheduling engineer wafer fabs
10
 min read
Culture
The Flex Factor with... James

Meet James Adamson, one of our senior optimization engineers here at Flexciton. Many, many moons ago he was an aspirant farmer, now he’s designing and improving our scheduling algorithms.

Meet James Adamson, one of our senior optimization engineers here at Flexciton. Many, many moons ago he was an aspirant farmer, now he’s designing and improving our scheduling algorithms. 

Tell us what you do at Flexciton?

I’m an Optimization Engineer, which essentially means I focus on designing and improving our scheduling algorithms, while also implementing and maintaining them in production code. I also have a technical lead role for one of our customers, so I spend some time understanding their requirements in detail and thinking about how to expand the product or customise it to meet their individual needs.  

What does a typical day look like for you at Flexciton?

In my engineering team we kick things off with a stand-up to agree on priorities for the day and discuss any issues that need attention. My day would then typically be a mix of drinking coffee, getting stuck into writing code for some new functionality, and having design discussions with other members of the team to keep us aligned technically. 

What do you enjoy most about your role?

I would say the opportunity to combine two things: working on one of the most challenging optimisation problems out there; and the ability to actually have an impact, for example through getting my code into production or making and influencing key design decisions.

If you could give one piece of advice to someone, what would it be? 

I would maybe suggest they seek advice from better places… but no, I think it’s important to always be thinking about what it is you want, and to think several steps ahead. It’s all too easy to get stuck doing something you don’t enjoy.

If you could summarise working at Flexciton in 3 words, what would they be?

Interesting, challenging, impactful.

If you could swap jobs with anyone for a day, who would it be and why?

I used to want to be a farmer… so provided I could pick a day with decent weather then sure why not give that a go for day. I reckon it’s much harder work than the idea I used to have of chilling on a combine harvester though…

Tell us about your best memory at Flexciton?

There’s a whole bunch of memories from our team trips, most recently to Albufeira in Portugal where some people really shone with their dance moves. I will avoid naming names.

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innovations in wafer fab production scheduling using optimization and heuristics
10
 min read
Technical
Scheduling Innovations: Academic Research and its Adoption in the Semiconductor Industry

This article focuses on innovations in scheduling: algorithms which assign lots to machines, decide in which order they should run, and ensure any required secondary resources are available.

Introduction

The first integrated circuits were invented by Texas Instruments and Fairchild Semiconductor in 1959. Today, semiconductor manufacturing is a $600 billion dollar industry and microchips are ubiquitous and impact our lives in ever increasing ways. To achieve such astonishing growth, academics and industry have had to constantly innovate, researching new production technologies. While much has been said about Moore's law and the push towards higher and higher transistor densities, the innovations made in how the billion dollar factories producing these chips are run have received less attention. This article focuses on innovations in scheduling: algorithms which assign lots to machines, decide in which order they should run, and ensure any required secondary resources (e.g. reticles) are available. These decisions can significantly impact the throughput and efficiency of wafer fabs.

Many innovative technologies in scheduling were first proposed by researchers and have, over time, been adapted in manufacturing. They include:

  • Dispatching: rule-based systems for deciding which lot to run next on a tool 
  • Optimization-based scheduling: mathematical techniques like mixed integer programming and constraint programming which can generate optimal machine assignments, sequencing, and more for entire toolsets or areas of the fab, improving fab-wide objectives like cycle-time or cost
  • Simulation: computer models of the manufacturing process which are often used to run what-if analysis, evaluate performance, and aid decision making

From dispatching to mathematical programming

Early academic research on dispatching rules dates back to the 1980s. Authors at the time already highlighted the significant impact scheduling can have on semiconductor manufacturing. They experimented with different types of dispatching rules, ranging from simple first-in-first-out (FIFO) rules to more bespoke rules focused on particular bottleneck tools. Over time, dispatching rules have evolved from fairly simple to increasingly complex. Rule-based dispatching systems quickly became the state-of-the-art in the industry and continue to be popular for several reasons: they can be intuitive and easy to implement, yet allow covering varying requirements. There are, however, also many situations in which dispatching rules may perform poorly: they have no foresight and generally look only at a single tool and therefore often struggle with load balancing between tools. They also struggle with more advanced constraints such as time constraints or auxiliary resources, e.g. reticles in photolithography. More generally, dispatching systems are a mature technology that has been pushed to its limits and is unlikely to lead to significant increases in productivity and yields.

For these reasons, focus has shifted over time to alternative technologies, especially deterministic scheduling based on mixed-integer programming or constraint programming. In the academic literature, these approaches start to increasingly show up around the 1990s. Early contributions focused on analysing the complexity of the wafer fab scheduling problem and solved the resulting optimization problem using heuristic techniques, but slowly moved towards rigorously scheduling single machines, tackling one particular aspect of the problem at a time. Due to the limited scope deterministic techniques could initially tackle, their adoption in industry lagged behind the academic discussion. 

From single machines to fab-wide scheduling

The last twenty years have seen deterministic scheduling techniques mature and schedule larger and more complex fab areas. In the academic literature, authors moved from focusing on single (batching) tools, to entire toolsets or larger areas of the fab including re-entrant flows. They also started including more and more operational constraints such as sequence-dependent setup and processing times, time constraints, or secondary resources such as reticles. In order to achieve this increase in scale and complexity, researchers have applied a large number of optimization techniques, and often combined rigorous mathematical programming methods with heuristic approaches.  Some have used general purpose meta-heuristics, such as genetic algorithms or simulated annealing, while others have developed bespoke heuristics for fab scheduling, such as the shifting bottleneck heuristic

As the size of problems optimization-based scheduling techniques could solve grew, the industry started to explore how to adopt these methods in practice. For example, in 2006, IBM announced that it had successfully used a combination of mixed-integer programming and constraint programming to schedule an area of a fab with up to 500 lot-steps and that this had led to a significant reduction in cycle time. Our own technology at Flexciton leverages mathematical optimization and smart decomposition, combined with modern cloud computing, to efficiently schedule entire fabs. One key advantage of using cloud technology is the ability to access huge amounts of computational power. It allows to break down complicated problems and deliver accurate schedules every few minutes, as well as the ability to adapt the solution strategy to the complexity at hand. Additionally, it enables responsive adjustments, as events unravel in real-time, allowing for a truly dynamic approach to scheduling.

Optimization-based scheduling’s trajectory from an academic niche to a high-impact technology has partially been accelerated by two major trends:

The process has been accompanied by considerable improvements in productivity, as scheduling is able to overcome many of the downsides of dispatching: it can look ahead in time, balance WIP across tools, and improve fab-wide objectives such as cost or cycle-time. A major advantage of scheduling is that it can both increase yields when demand is high and reduce cost when demand is low. 

When in doubt, simulate.

A discussion of scheduling in wafer fabs would not be complete without a word on simulation models. Simulation models are technically not scheduling algorithms - they require dispatching rules or deterministic scheduling inside them to decide machine assignment and sequencing. But they have been used to evaluate and compare different scheduling approaches from the very beginning. They were also quickly adopted by industry and have, for example, been used by STMicroelectronics to re-prioritise lots and by Infineon to help identify better dispatching rules. The development of highly reliable simulation models could greatly increase their use for performance evaluation and scheduling.

The future

More reliable simulation models are also important in light of recent trends in academic literature, which may provide a glimpse into the future of wafer fab scheduling. Rigid dispatching rules that need to be (re)tuned frequently may soon be replaced by deep reinforcement learning agents which learn dispatching rules that improve overall fab objectives. In some studies, such systems have been shown to perform as well as dispatching systems based on expert knowledge. If and when the industry adopts such techniques on a large scale remains to be seen. Since they require accurate simulation models as training environments, they can be extremely computationally intensive, and their adoption will largely depend on the development of faster training and simulation models. The combination of self-learning dispatching systems, and comprehensive, scalable scheduling models may well hold the key to unlocking unprecedented improvements in fab productivity. 

Flexciton aspires to be the key enabler in this transition, bringing state-of-the-art scheduling technology to the shop floor in a modern, sophisticated, and user-friendly platform unlike anything else on the market. Despite the enormous challenges that come with the scale of this endeavour, the initial results are very encouraging; cloud-based optimization solutions can indeed bring a step change to streamlining wafer fab scheduling while delivering consistent efficiency gains. 

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